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prism_result_chunk_store

II1 cyclePipeline depth3 stages (chunk geometry)Memory8 banks, replicated per read port

prism_result_chunk_store assembles converted result tiles into protocol-sized chunks and owns their payload memory until every routed packet job releases its reference.

Contracts

  • Converted result tile: accepts tile metadata, result element bits, lane keep bits, and accumulation status.
  • Completed chunk: publishes prism_result_chunk_meta_t and its storage slot to the result router.
  • Reference arm: accepts the number of packet jobs that will read a completed slot.
  • Read ports: synchronously serve one beat-aligned 512-bit payload word.
  • Arm status: returns a registered, slot-tagged response to each packetizer query.
  • Release ports: decrement the slot reference count after packet transmission.
  • Operation completion: reports the operation slot after all of its result chunks complete their lifetime.

Contract behavior

  • Maps global element indices to protocol chunk indices and byte offsets.
  • Computes the non-power-of-two protocol chunk geometry with a three-stage fixed-point reciprocal pipeline. The reciprocal estimate can only be exact or one too small, so the final stage corrects it using the remainder. An elastic assembly boundary and a registered write plan retain one accepted result group per cycle. Chunk publication still waits for all expected elements and therefore has no single fixed module latency.
  • Publishes a chunk only after every expected element has been written.
  • Keeps an armed chunk immutable while packetizers read it.
  • Registers arm-status queries before they return to a packetizer. This removes a same-cycle control path through the shared slot table while the response tag prevents a stale status from being applied to a different job.
  • Frees a slot only after all armed references have been released.
  • Supports a tile crossing at most two adjacent result chunks.
  • Uses a deterministic power-of-two slot map derived from operation slot and chunk index. A collision with a still-live chunk applies normal ready/valid backpressure and can never alias or overwrite stored data. Consequently, RESULT_SLOTS must be a power of two, at least OPERATION_CONTEXTS, and an integer multiple of it.
  • Packs each accepted issue group as one contiguous byte stream, aligns it once, and writes at most five 512-bit words per affected chunk. This preserves one group per cycle without a lane-by-lane dynamic byte-scatter crossbar.
  • Stores payloads in eight 512-bit write banks, shifted by the 40-byte RES header so storage words align with transmitted AXI beats. Each read port owns a RAM replica, allowing independent packetizers without a combinational byte-addressed multiport memory. A vendor-neutral synchronous RAM template with byte write enables is shared by simulation and synthesis; the target tool chooses the physical memory primitive.
  • Registers completed-chunk selection so slot and metadata remain stable under downstream backpressure. The stage supports simultaneous consume/refill and therefore retains a maximum rate of one completed chunk per cycle.