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prism_input_conversion_stage

II1 cyclePipeline depth2 stages

prism_input_conversion_stage converts one typed input tile into the representation selected for its operation. The scheduler therefore consumes a uniform tile contract instead of implementing wire-format conversion.

Contracts

  • Wire tile: accepts the input format, accumulation selection, 32-bit lane containers, lane keep bits, and an opaque scheduler tag.
  • FP32 representation: publishes canonical binary32 lanes for the ordered floating-point path.
  • Kulisch representation: publishes signed fixed-point deposits at KULISCH_ACC_W (279 bits by default).
  • Classification: publishes finite, zero, zero-sign, NaN, infinity, and deposit-overflow masks with the same tile.
  • Status: reports an unsupported format through m_format_error.

Contract behavior

  • Selects the binary32 or Kulisch converter from the accumulator profile.
  • Uses one format-aware floating-point aligner per active lane for FP16, BF16, and FP32 Kulisch deposits. The formats share hardware without serializing the 512-bit input beat; INT8 keeps its inexpensive dedicated path.
  • Splits Kulisch conversion into format decoding, fixed-point alignment, and saturation or signed-deposit generation.
  • Carries only the conversion controls, scheduler tag, FP32 lanes, keep bits, classifications, and status through the same two-stage elastic pipeline.
  • Preserves inactive lanes through the element-keep mask.
  • Carries the scheduler admission token through conversion so the result can commit without repeating range lookup.
  • Publishes the scheduler tag, numeric representation, classifications, and status atomically. Full protocol metadata remains in the scheduler range state instead of crossing the wide conversion datapath.