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PRISM (Precision-aware Reduction In-Switch Module) is an open-source RTL research prototype for “in-network collective” (INC) operations on FPGA-based packet-processing datapaths. The project studies how reduction-oriented collective operations, such as REDUCE_SUM¹ aggregation, can be partially offloaded from the host accelerator (CPU/GPU) communication stack into the network data plane itself with concern to reproducibility. In this sense, PRISM is inspired by the same broad direction as Mellanox/NVIDIA SHARP², which demonstrated that collective reduction processing can be moved into network switching hardware to reduce communication overhead and improve collective latency.

The datapath exposes a 512-bit AXI-Stream interface. The hardware target is the AMD Alveo U280: the board build connects the core to one 100G port through the CMAC subsystem and the packet adapter of the OpenNIC shell, without a host interface. Hosts take part only over Ethernet.

From a numerical perspective, PRISM focuses on reproducible floating-point reductions. Conventional FP32 reductions are sensitive to operand ordering because floating-point addition is not associative; different reduction trees or scheduling orders may produce different bit-level results. PRISM therefore compares the baseline FP32_ARRIVAL profile against a Kulisch-style³ long-accumulator approach, with the goal of studying the area, latency, throughput, and reproducibility trade-offs of exact or near-exact accumulation in a streaming network datapath.

The target architecture is a reusable, port-parameterized collective core. It implements buffering, backpressure, CONTROL, reduction, result routing, and replication; prism_u280_top connects the same RTL to the 100G port of the board. Forwarding, VOQs, a general crossbar, and multi-switch aggregation remain later integration work.

The latest source code is available from the PRISM GitHub repository.

Citation¶

If you use PRISM in your project, please cite the repository and/or the thesis:

@misc{prism-repository,
  author = {Cipolletti, Lorenzo},
  title = {PRISM Repository},
  year = {2026},
  howpublished = {\url{https://github.com/uniquadev/prism}},
  note = {Bachelor thesis project repository}
}

@mastersthesis{cipolletti-prism-thesis,
  author = {Cipolletti, Lorenzo},
  title = {Development of Primitive Hardware for Network Computing},
  school = {Sapienza University of Rome},
  year = {2026},
  type = {Bachelor thesis},
  note = {Supervisor: Salvatore Pontarelli; co-supervisor: Daniele De Sensi}
}

Reading guide¶

1.1 Reproducibility gives the motivation, 2. Getting Started runs the tests, the experiments and the board, 3.1 Protocol and 3.2 Pipeline describe the hardware, and 4. Results holds the measurements.